There is a need for a digital electronics test system that is inexpensive to produce and small enough to be easily portable and shielded in harsh environments while still being capable of performing desired functional tests on electrical systems. Current systems used to test digital components are large and expensive to create. Existing testers are often extremely heavy, bulky, and not easily portable. Existing systems also are not suitable for use in various testing environments such as radiation testing or operational configurations where radiation is present. New capabilities are needed to meet needs associated with electronic testing, particularly ones that operate in harsh radiation environments (e.g., test spaces or space environments). One requirement for certain embodiments include one that the key components of test systems are not exposed to radiation or require less shielding than existing systems when testing, end-use, or operations are done in high stress environments such as radiation environments.
Existing test devices are large and expensive to produce and maintain, costing in excess of $10,000 which limits a test devices ability to be easily discarded in the event of radiation damage. Moreover, DUT interface boards generally must be created specifically for a DUT that needs to be connected to the testing device, which adds to the expense.
An exemplary embodiment of the present invention can be designed to utilize an electronics device interface structure, e.g., a 48-pin Dual-Inline Package (DIP) footprint, and perform functional tests on digital electronics (e.g., memories, microprocessors, application specific integrated circuits (ASIC), and analog-to-digital converters (ADC)) with a highly adaptable and programmable set of test structure interface, power, programming, communication, memory, backup, and control structures.
Embodiments of the invention can utilize structures for maximizing flexibility with respect to DUT interfaces. For example, embodiments can be created for interfaces such as IC, package, electrical device, or microelectronic footprint or electrical interfaces such as zero insertion force (ZIF) sockets and surface-mount technology (SMT) packages such as plastic leaded chip carrier (PLCC) and small-outline integrated circuit (SOIC).
Aspects of this invention may also be used to replace a variety of digital logic devices (e.g., Static Random-Access Memory (SRAM), microcontrollers, flip-flops, and logic gates). One example can include a DUT which is coupled to a tester structure through interface(s) by, for example, a DUT board. Another embodiment also can incorporate an adapter board which couples between the tester structure and the DUT board.
One aspect of an embodiment of the invention permits testing of digital electronics in harsh environments. An exemplary system can fit within a forty eight-pin DIP footprint that is capable of performing tests on digital electronic systems while being small enough to be highly portable and capable of being shielded properly when exposed to high levels of radiation in harsh environments (e.g., space). Exemplary aspects of an embodiment of the invention can be small enough to fit within a structure of a DUT board. Some embodiments can include a structure adapted to position a DUT over an aperture in supporting structure, such as a DUT board or another structure, which permits radiation in a test or operational environment to pass through the aperture with radiation sensitive supporting structures or components positioned around the aperture. The aperture also permits radiation source vectors to be applied to either side of a DUT and minimize direct exposure of radiation sources that otherwise pass directly through a DUT or component placed in a position of a DUT.
One aspect of the invention can include an advanced Field Programmable Gate Array (FPGA) based test system placed within a tester structure having an interface with a DUT interface structure that receives the DUT. An exemplary tester structure can have dimensions of approximately 0.6 inches by 2.4 inches. Small sized tester structure coupled with such a DUT interface structure enable, for example, an entire test system incorporating a forty eight-pin DIP package footprint. An exemplary embodiment of a tester structure can be constructed to include, e.g., forty programmable input/outputs (I/O) which can be set to operate at different voltage levels and enabled to toggle at, e.g., a high frequency. An exemplary embodiment of the present disclosure is small and light enough that it allows for the invention to be easily transportable and capable of more easily being shielded from harsh environments.
An embodiment of the invention avoids a need for designing and building a custom DUT interface and DUT boards in all or most cases where a DUT is suitably sized relative to an interface of an embodiment of the invention.
Additional features and advantages of the present invention will become apparent to those skilled in the art upon consideration of the following detailed description of the illustrative embodiment exemplifying the best mode of carrying out the invention as presently perceived.